drm/amdgpu: add indirect r/w interface for smn address greater than 32bits
authorLe Ma <le.ma@amd.com>
Sat, 2 Apr 2022 11:39:59 +0000 (19:39 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 9 Jun 2023 13:45:29 +0000 (09:45 -0400)
commit0c552ed38780f24b7ac235c3d10c6c94686ecfdf
tree5c8bb30c898f2c3db5dc639888226b9069090fa8
parent1526ec9a3ed90e7ad36de7ef8aa2768b60af14df
drm/amdgpu: add indirect r/w interface for smn address greater than 32bits

On multiple AIDs platform, bit[34:32] in SMD address is leveraged to access
nonAID0 register smn address and new PCI_INDEX_HI register is introduced
to access the higher bits.

v2: rebase on latest register accessors (Alex)

Signed-off-by: Le Ma <le.ma@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h
drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
drivers/gpu/drm/amd/amdgpu/soc15.c