i.MX6SX: crypto/fsl: fix entropy delay value
authorGaurav Jain <gaurav.jain@nxp.com>
Fri, 15 Apr 2022 11:10:49 +0000 (16:40 +0530)
committerStefano Babic <sbabic@denx.de>
Thu, 19 May 2022 19:39:36 +0000 (21:39 +0200)
commit0c45c77b8aeac0c3c5a0b5ea13a44ee478b51fdb
tree6df39d78304f7eed572a0d148fd37741a94cd763
parent9fd406de522ef1fb5863837eee1dd9bd99cd4b07
i.MX6SX: crypto/fsl: fix entropy delay value

RNG Hardware error is reported due to incorrect entropy delay

rng self test are run to determine the correct ent_dly.
test is executed with different voltage and temperature to identify the
worst case value for ent_dly. after adding a margin value(1000),
ent_dly should be at least 12000.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
drivers/crypto/fsl/jr.c
include/fsl_sec.h