[RISCV] Enable SPLAT_VECTOR for fixed vXi64 types on RV32.
authorCraig Topper <craig.topper@sifive.com>
Thu, 29 Apr 2021 15:10:39 +0000 (08:10 -0700)
committerCraig Topper <craig.topper@sifive.com>
Thu, 29 Apr 2021 15:20:09 +0000 (08:20 -0700)
commit0c330afdfa42370fb50979efd1ee6bcbe9642b6d
tree4de54b50284fce059e5519a77cb8c3ea5fb1f497
parent25391cec3a81c3c2c4ac3f2ce0efda961766ab07
[RISCV] Enable SPLAT_VECTOR for fixed vXi64 types on RV32.

This replaces D98479.

This allows type legalization to form SPLAT_VECTOR_PARTS so we don't
lose the splattedness when the scalar type is split.

I'm handling SPLAT_VECTOR_PARTS for fixed vectors separately so
we can continue using non-VL nodes for scalable vectors.

I limited to RV32+vXi64 because DAGCombiner::visitBUILD_VECTOR likes
to form SPLAT_VECTOR before seeing if it can replace the BUILD_VECTOR
with other operations. Especially interesting is a splat BUILD_VECTOR of
the extract_vector_elt which can become a splat shuffle, but won't if
we form SPLAT_VECTOR first. We either need to reorder visitBUILD_VECTOR
or add visitSPLAT_VECTOR.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D100803
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll