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(parent: 00853a4) | patch
drm/amd/display: update dispclk and dppclk vco frequency
authorEric Yang <Eric.Yang2@amd.com>
Fri, 15 Nov 2019 17:04:25 +0000 (12:04 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 5 Dec 2019 21:32:18 +0000 (16:32 -0500)
commit0beb54039d46702a7bc66ee1f36378785b450421
treea8b3cefe78c4d5301f2df77f96275de2cfaa8cfatree | snapshot
parent00853a4f7dd52e4529f681a685073f1533e1ed19commit | diff
drm/amd/display: update dispclk and dppclk vco frequency

Value obtained from DV is not allowing 8k60 CTA mode with DSC to
pass, after checking real value being used in hw, find out that
correct value is 3600, which will allow that mode.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c diff | blob | history
Domain: System / Kernel;