[AMDGPU][MC] Corrected decoding of 16-bit literals
authorDmitry Preobrazhensky <dmitry.preobrazhensky@amd.com>
Wed, 22 Jul 2020 14:16:59 +0000 (17:16 +0300)
committerDmitry Preobrazhensky <dmitry.preobrazhensky@amd.com>
Wed, 22 Jul 2020 14:20:43 +0000 (17:20 +0300)
commit0b8fd77ad953e6968242a131a5ed3b881c19daac
treee3873edc78dd79ba8eb9a4ee2419b0935d8535b3
parentc61dcb8f623e5d289164f44c086867d0b052b1e5
[AMDGPU][MC] Corrected decoding of 16-bit literals

16-bit literals are encoded as 32-bit values. If high 16-bits of the value is 0xFFFF, the decoded instruction cannot be reassembled.

For example, the following code

0xff,0x04,0x04,0x52,0xcd,0xab,0xff,0xff

was decoded as

v_mul_lo_u16_e32 v2, 0xffffabcd, v2

However this literal is actually a 64-bit constant 0x00000000ffffabcd which violates requirements described in the documentation - the truncation is not safe.

This change corrects decoding to make reassembly possible.

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D84098
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
llvm/test/CodeGen/AMDGPU/add.i16.ll
llvm/test/CodeGen/AMDGPU/add.v2i16.ll
llvm/test/CodeGen/AMDGPU/imm16.ll
llvm/test/CodeGen/AMDGPU/sub.i16.ll
llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
llvm/test/MC/Disassembler/AMDGPU/literal16_vi.txt
llvm/test/MC/Disassembler/AMDGPU/vop1.txt
llvm/test/MC/Disassembler/AMDGPU/vop3-literal.txt