drm/amd/powerplay: correct the supported pcie GenSpeed and LaneCount
authorEvan Quan <evan.quan@amd.com>
Fri, 3 Jul 2020 06:53:06 +0000 (14:53 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 15 Jul 2020 16:43:59 +0000 (12:43 -0400)
commit0b590970a519dee488dd21a43c55de9f62ff82fa
treee96793d301d66ce79c7080e66eb21a40f8e84a96
parent778f8e6afea64e432d28f69e1c55688e4e9283d5
drm/amd/powerplay: correct the supported pcie GenSpeed and LaneCount

The LCLK dpm table setup should be performed in .update_pcie_parameters().
Otherwise, the updated GenSpeed and LaneCount information will be lost.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/navi10_ppt.c
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c