[X86][Costmodel] Load/store i8 Stride=6 VF=8 interleaving costs
authorRoman Lebedev <lebedev.ri@gmail.com>
Sun, 3 Oct 2021 20:23:08 +0000 (23:23 +0300)
committerRoman Lebedev <lebedev.ri@gmail.com>
Sun, 3 Oct 2021 20:38:54 +0000 (23:38 +0300)
commit0b27f9c0886fcd052b4b0194c6d41376787213d4
tree6e2be6e1faebe7f39050e23ab1b24b575a063681
parent6fe4cce55816863bbb2ca9628d103dfa2d431616
[X86][Costmodel] Load/store i8 Stride=6 VF=8 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/v98qPTTf6 - for intels `Block RThroughput: =18.0`; for ryzens, `Block RThroughput: =6.0`
So pick cost of `18`.

For store we have:
https://godbolt.org/z/rn5T9E8q6 - for intels `Block RThroughput: <=16.0`; for ryzens, `Block RThroughput: <=4.5`
So pick cost of `16`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111011
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-6.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-6.ll