clk/exynos5250: fix bit number for tv sysmmu clock
authorRahul Sharma <rahul.sharma@samsung.com>
Thu, 19 Jun 2014 05:47:16 +0000 (11:17 +0530)
committerTomasz Figa <t.figa@samsung.com>
Mon, 30 Jun 2014 12:46:36 +0000 (14:46 +0200)
commit0b1643b39ddae68f1b1b5ed848c8268a004a60a9
treec3baee230a6f966cdaeca46dd8cf25327e34a2ad
parenta92dda4bfad338b48c6190b1da70fe7f0eefc55d
clk/exynos5250: fix bit number for tv sysmmu clock

Change bit from 2 to 9 for tv (mixer) sysmmu clock.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Reviewed-by: Sachin Kamat <sachin.kamat@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
drivers/clk/samsung/clk-exynos5250.c