[ARM] Add <saturate> operand to SQRSHRL and UQRSHLL
authorMikhail Maltsev <mikhail.maltsev@arm.com>
Fri, 19 Jul 2019 09:46:28 +0000 (09:46 +0000)
committerMikhail Maltsev <mikhail.maltsev@arm.com>
Fri, 19 Jul 2019 09:46:28 +0000 (09:46 +0000)
commit0b001f94a54a93e3e7ff080c829de8684f92630a
tree2d2dbc474d0abb5c6d8c0a68b453d90f57707de5
parent9c377105da0be7c2c9a3c70035ce674c71b846af
[ARM] Add <saturate> operand to SQRSHRL and UQRSHLL

Summary:
According to the new Armv8-M specification
https://static.docs.arm.com/ddi0553/bh/DDI0553B_h_armv8m_arm.pdf the
instructions SQRSHRL and UQRSHLL now have an additional immediate
operand <saturate>. The new assembly syntax is:

SQRSHRL<c> RdaLo, RdaHi, #<saturate>, Rm
UQRSHLL<c> RdaLo, RdaHi, #<saturate>, Rm

where <saturate> can be either 64 (the existing behavior) or 48, in
that case the result is saturated to 48 bits.

The new operand is encoded as follows:
  #64 Encoded as sat = 0
  #48 Encoded as sat = 1
sat is bit 7 of the instruction bit pattern.

This patch adds a new assembler operand class MveSaturateOperand which
implements parsing and encoding. Decoding is implemented in
DecodeMVEOverlappingLongShift.

Reviewers: ostannard, simon_tatham, t.p.northover, samparker, dmgreen, SjoerdMeijer

Reviewed By: simon_tatham

Subscribers: javed.absar, kristof.beyls, hiraditya, pbarrio, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64810

llvm-svn: 366555
llvm/lib/Target/ARM/ARMInstrFormats.td
llvm/lib/Target/ARM/ARMInstrMVE.td
llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h
llvm/test/MC/ARM/mve-scalar-shift.s
llvm/test/MC/Disassembler/ARM/mve-scalar-shift.txt