ASoC: tegra: fix I2S bit count mask
authorStephen Warren <swarren@nvidia.com>
Tue, 5 Mar 2013 00:10:20 +0000 (17:10 -0700)
committerMark Brown <broonie@opensource.wolfsonmicro.com>
Tue, 5 Mar 2013 02:42:11 +0000 (10:42 +0800)
commit0af18c5cc9403999bb189f825b816f7fc80fc0ee
treeec65734228968d4948dd50b9551aaea799058558
parent6dbe51c251a327e012439c4772097a13df43c5b8
ASoC: tegra: fix I2S bit count mask

This register field is 11 bits wide, not 15 bits wide. Given the way
this value is currently, used, this patch has no practical effect.
However, it's still best if the value is correct.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
sound/soc/tegra/tegra20_i2s.h
sound/soc/tegra/tegra30_i2s.h