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[RISCV] Use bitfields to shrink the size of the vector load/store intrinsics to pseud...
authorCraig Topper <craig.topper@sifive.com>
Mon, 7 Jun 2021 23:35:27 +0000 (16:35 -0700)
committerCraig Topper <craig.topper@sifive.com>
Tue, 8 Jun 2021 00:57:51 +0000 (17:57 -0700)
commit0aa941654fc06d76d4fea57ea1b205f93dce391b
tree120d7ab7dc1698d402c5605c1555a4037bfb70b5tree | snapshot
parent11539edf52d53ccbd42040a30e29d117600cfd6bcommit | diff
[RISCV] Use bitfields to shrink the size of the vector load/store intrinsics to pseudo instruction lookup tables.
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h diff | blob | history
Domain: System / Toolchain;