MIR: Use Register
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 8 Apr 2020 21:25:21 +0000 (17:25 -0400)
committerMatt Arsenault <arsenm2@gmail.com>
Thu, 9 Apr 2020 02:07:26 +0000 (22:07 -0400)
commit0aa0d700678228261e08947914cc1dedd5db8ef5
treefe6ed332483242e65eb58d6aee2e2e246ab75c19
parent293c5210ecb53d706b3d144f9a295a002774ea67
MIR: Use Register
llvm/include/llvm/CodeGen/MIRParser/MIParser.h
llvm/lib/CodeGen/MIRParser/MIParser.cpp
llvm/lib/CodeGen/MIRParser/MIRParser.cpp
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp