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clk: renesas: r8a7795: Fix HDMI parent clock
authorTakeshi Kihara <takeshi.kihara.df@renesas.com>
Fri, 4 Nov 2016 13:58:07 +0000 (14:58 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 7 Nov 2016 14:16:18 +0000 (15:16 +0100)
commit0a30284b9fe19780d4587e74578e460469d88706
treea41ddd1e63cf6a68ee5202de5d61e1dae6445de8tree | snapshot
parente6e3558626f6dbc16bc13587a1a981dc2446300ecommit | diff
clk: renesas: r8a7795: Fix HDMI parent clock

Correct HDMI parent clock so that the rate of the
HDMI clock is 1/4 rather than 1/2 of the rate of PLL1
as per the v0.52 (Jun, 15) manual.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a7795-cpg-mssr.c diff | blob | history
Domain: System / Kernel;