arm64: cpufeature: Always specify and use a field width for capabilities
authorMark Brown <broonie@kernel.org>
Mon, 7 Feb 2022 15:20:32 +0000 (15:20 +0000)
committerWill Deacon <will@kernel.org>
Fri, 25 Feb 2022 14:28:18 +0000 (14:28 +0000)
commit0a2eec83c2c23cf609e781732b338a9a4f18e00c
tree250b6b2c6104bc0e3f1b739cd23290b3108a0cb5
parent3bb72d86d80eb9296d43f9e807b6f9ff58049552
arm64: cpufeature: Always specify and use a field width for capabilities

Since all the fields in the main ID registers are 4 bits wide we have up
until now not bothered specifying the width in the code. Since we now
wish to use this mechanism to enumerate features from the floating point
feature registers which do not follow this pattern add a width to the
table.  This means updating all the existing table entries but makes it
less likely that we run into issues in future due to implicitly assuming
a 4 bit width.

Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20220207152109.197566-4-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
arch/arm64/include/asm/cpufeature.h
arch/arm64/kernel/cpufeature.c