drm/amd/display: add support for per-state dummy-pstate latency
authorJun Lei <jun.lei@amd.com>
Tue, 26 May 2020 15:17:53 +0000 (11:17 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 1 Jul 2020 05:59:20 +0000 (01:59 -0400)
commit0a25e8eb95cd7bf28857ef671296154c25b1fb44
treed6da45a57034e164e113545df943d64b3c254027
parenta1500a62d094544e2a513a2569d38321cbbbee3c
drm/amd/display: add support for per-state dummy-pstate latency

[why]
Dummy pstate latency actually varies between different
UCLK frequencies, when calculating watermark C, if DAL
always assumes worst case, then it can lead to dummy
pstate not supported scenarios.

[how]
Rather than statically calculating dummy pstate using
worst case, we store the entire table of UCLK to dummy
pstate relationships.  On a per mode basis, we calculate
the actual UCLK lower limit, and use the dynamic worst
case dummy pstate latency.  This prevents the situation
where we don't support full p-state (which will force
high DPM), but still use low DPM dummy pstate latency.

Signed-off-by: Jun Lei <jun.lei@amd.com>
Reviewed-by: Joshua Aberback <Joshua.Aberback@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h