i965: Always set tiling for depth buffer on sandybridge
authorZhenyu Wang <zhenyuw@linux.intel.com>
Wed, 29 Sep 2010 05:59:03 +0000 (13:59 +0800)
committerZhenyu Wang <zhenyuw@linux.intel.com>
Wed, 29 Sep 2010 06:02:37 +0000 (14:02 +0800)
commit0a1910c26760762eb8d67f68dfd87494ab479e38
tree856b04c9a7db710693e53dbf27ec3ee3d4fd9963
parent28b57c56e21943055f8d3c08822c4f632468b0b1
i965: Always set tiling for depth buffer on sandybridge

Sandybridge only support tiling depth buffer, always set tiling bit.

Fix 'fbo_firecube' demo.
src/mesa/drivers/dri/i965/brw_misc_state.c