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soc: Support for NPS HW scheduling
authorNoam Camus <noamca@mellanox.com>
Wed, 16 Nov 2016 06:31:11 +0000 (08:31 +0200)
committerVineet Gupta <vgupta@synopsys.com>
Wed, 30 Nov 2016 19:54:25 +0000 (11:54 -0800)
commit09dcd1958be42ea473fef24a2c02d975f520ea71
tree60d945f93dc3796e85e7cb37b06039e91a806199tree | snapshot
parentc4c9a040ecb7297e011e579f5a9cc280e42d725fcommit | diff
soc: Support for NPS HW scheduling

This new header file is for NPS400 SoC (part of ARC architecture).
The header file includes macros for save/restore of HW scheduling.
The control of HW scheduling is achieved by writing core registers.
This code was moved from arc/plat-eznps so it can be used
from drivers/clocksource/, available only for CONFIG_EZNPS_MTM_EXT.

Signed-off-by: Noam Camus <noamca@mellanox.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
arch/arc/plat-eznps/include/plat/ctop.h diff | blob | history
include/soc/nps/mtm.h [new file with mode: 0644] blob
Domain: System / Kernel; Licenses: GPL-2.0;