[X86] Add isel patterns for X86VBroadcast with i16 truncates from i16->i64 zextload...
authorCraig Topper <craig.topper@gmail.com>
Fri, 13 Mar 2020 06:40:04 +0000 (23:40 -0700)
committerCraig Topper <craig.topper@gmail.com>
Fri, 13 Mar 2020 07:10:48 +0000 (00:10 -0700)
commit09c8f38924d4bc302984de7bf67f4dbae15c38dc
tree559c426e3a1f28c4082833a043d7b649dd3d93fe
parent51a4c6125ca6f25cff39c82a62878556b430d7f1
[X86] Add isel patterns for X86VBroadcast with i16 truncates from i16->i64 zextload/extload.

We can form vpbroadcastw with a folded load.

We had patterns for i16->i32 zextload/extload, but nothing prevents
i64 from occuring.

I'd like to move this all to DAG combine to fix more cases, but
this is trivial fix to minimize test diffs when moving to a combine.
llvm/lib/Target/X86/X86InstrAVX512.td
llvm/lib/Target/X86/X86InstrSSE.td
llvm/test/CodeGen/X86/vector-shuffle-128-v8.ll
llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll