arm64: smccc: add support for SMCCCv1.2 x0-x17 registers
authorAbdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Thu, 13 Jul 2023 13:28:38 +0000 (14:28 +0100)
committerTom Rini <trini@konsulko.com>
Mon, 24 Jul 2023 19:30:02 +0000 (15:30 -0400)
commit096d471a768bd5decc0df29fc0f200a44dea526b
treea3af9b0eb7ab994dcd5f631d2222d36ed1b8f8a5
parentc07ad9520c6190070513016fdb495d4703a4a853
arm64: smccc: add support for SMCCCv1.2 x0-x17 registers

add support for x0-x17 registers used by the SMC calls

In SMCCC v1.2 [1] arguments are passed in registers x1-x17.
Results are returned in x0-x17.

This work is inspired from the following kernel commit:

arm64: smccc: Add support for SMCCCv1.2 extended input/output registers

[1]: https://documentation-service.arm.com/static/5f8edaeff86e16515cdbe4c6?token=

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
arch/arm/cpu/armv8/smccc-call.S
arch/arm/lib/asm-offsets.c
include/linux/arm-smccc.h