spi: cadence-quadspi: Wait at least 500 ms for direct reads
authorPratyush Yadav <p.yadav@ti.com>
Tue, 22 Dec 2020 18:44:24 +0000 (00:14 +0530)
committerMark Brown <broonie@kernel.org>
Wed, 6 Jan 2021 13:08:46 +0000 (13:08 +0000)
commit0920a32cf6f20467aa133a47b776ee782daa889f
tree4dae219710f8164b23744a0639b086da15f4b1ff
parenta273596b9b50c76a9cc1f65d3eb7f8ab5c3eb3e3
spi: cadence-quadspi: Wait at least 500 ms for direct reads

When performing a direct read via DMA the timeout for completion is set
equal to the read length. This is fine for larger reads. For a small
read like the Read Status Register command, the timeout would be 1 or 2
milliseconds. This is not enough to cover the overhead needed in setting
up DMA.

Make sure the timeout is at least 500 ms to allow DMA ample time to
finish. For reads larger than 500 bytes, the timeout will continue to be
equal to the read length.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reported-by: kernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/r/20201222184425.7028-7-p.yadav@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-cadence-quadspi.c