pwm: lpc32xx: Properly set PWM_ENABLE bit in lpc32xx_pwm_[enable|disable]
authorAxel Lin <axel.lin@ingics.com>
Tue, 23 Apr 2013 06:01:31 +0000 (14:01 +0800)
committerThierry Reding <thierry.reding@avionic-design.de>
Tue, 23 Apr 2013 08:58:35 +0000 (10:58 +0200)
commit08ee77b5a5de27ad63c92262ebcb4efe0da93b58
tree53a9b7ed0369ca015923b638457ceba14edce926
parentf1a8870aeb5baeb58f0613d1f1e1dca967127fbd
pwm: lpc32xx: Properly set PWM_ENABLE bit in lpc32xx_pwm_[enable|disable]

According to the LPC32x0 User Manual [1]:

For both PWM1 and PWM2 Control Registers:
BIT 31:
This bit gates the PWM_CLK signal and enables the external output pin
to the PWM_PIN_STATE logical level.

0 = PWM disabled. (Default)
1 = PWM enabled

So in lpc32xx_pwm_enable(), we should set PWM_ENABLE bit.
In lpc32xx_pwm_disable(), we should just clear PWM_ENABLE bit rather than
write 0 to the register which will also clear PWMx_RELOADV and PWMx_DUTY bits.

[1] http://www.nxp.com/documents/user_manual/UM10326.pdf

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Tested-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
drivers/pwm/pwm-lpc32xx.c