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(parent: 609ef94) | patch
[X86] Add inline assembly load hardening mitigation for Load Value Injection (LVI)
authorCraig Topper <craig.topper@intel.com>
Mon, 11 May 2020 20:28:41 +0000 (13:28 -0700)
committerCraig Topper <craig.topper@intel.com>
Mon, 11 May 2020 21:08:16 +0000 (14:08 -0700)
commit08b8b724ee3ac7ae7f516e036616620aa33968f1
tree93f4171112fd76711a368a6b32e13af95f83ae69tree | snapshot
parent609ef948387ba40e3693c2bd693d82ca34dcdc02commit | diff
[X86] Add inline assembly load hardening mitigation for Load Value Injection (LVI)

Added code to X86AsmParser::emitInstruction() to add an LFENCE after each instruction that may load, and emit a warning if it encounters an instruction that may be vulnerable, but cannot be automatically mitigated.

Differential Revision: https://reviews.llvm.org/D76158
llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp diff | blob | history
llvm/test/CodeGen/X86/lvi-hardening-inline-asm.ll [new file with mode: 0644] blob
Domain: System / Toolchain;