review.tizen.org Git - platform/upstream/dotnet/runtime.git/commit

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author	Egor Chesakov <Egor.Chesakov@microsoft.com>
	Thu, 7 May 2020 17:30:27 +0000 (10:30 -0700)
committer	GitHub <noreply@github.com>
	Thu, 7 May 2020 17:30:27 +0000 (10:30 -0700)
commit	08b244ed43b1684d8ee1fce9b6ed0e913f4cdba4
tree	256691c26b18b3b2633027a86326e0b869e1d9c9	tree \| snapshot
parent	6985ce6107465dd9c46e96de87bc67c8a1c45a67	commit \| diff

[Arm64] ASIMD Rename AddReturningHighNarrow to AddHighNarrow (#35919)

* Rename AddReturning{Rounded}HighNarrow to Add{Rounded}HighNarrow in AdvSimd.PlatformNotSupported.cs AdvSimd.cs

* Rename SubtractReturning{Rounded}HighNarrow to Subtract{Rounded}HighNarrow in AdvSimd.PlatformNotSupported.cs AdvSimd.cs

* Rename Add/SubtractReturning{Rounded}HighNarrow to Add/Subtract{Rounded}HighNarrow in hwintrinsiclistarm64.h

* Update System.Runtime.Intrinsics.Experimental.cs

* Rename Add/SubtractReturning{Rounded}HighNarrow to Add/Subtract{Rounded}HighNarrow in GenerateTests.csx

* Update Helpers.cs Helpers.tt

* Update AdvSimd/

58 files changed:

Domain: Dotnet / Core;

RSS Atom

src/coreclr/src/jit/hwintrinsiclistarm64.h		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddHighNarrowLower.Vector64.Byte.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningRoundedHighNarrowLower.Vector64.Byte.cs with 89% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddHighNarrowLower.Vector64.Int16.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningRoundedHighNarrowLower.Vector64.Int16.cs with 89% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddHighNarrowLower.Vector64.Int32.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningRoundedHighNarrowLower.Vector64.Int32.cs with 89% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddHighNarrowLower.Vector64.SByte.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningRoundedHighNarrowLower.Vector64.SByte.cs with 89% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddHighNarrowLower.Vector64.UInt16.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningRoundedHighNarrowLower.Vector64.UInt16.cs with 89% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddHighNarrowLower.Vector64.UInt32.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningRoundedHighNarrowLower.Vector64.UInt32.cs with 89% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddHighNarrowUpper.Vector128.Byte.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningHighNarrowUpper.Vector128.Byte.cs with 91% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddHighNarrowUpper.Vector128.Int16.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningRoundedHighNarrowUpper.Vector128.Int16.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddHighNarrowUpper.Vector128.Int32.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningRoundedHighNarrowUpper.Vector128.Int32.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddHighNarrowUpper.Vector128.SByte.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningRoundedHighNarrowUpper.Vector128.SByte.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddHighNarrowUpper.Vector128.UInt16.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningHighNarrowUpper.Vector128.UInt16.cs with 91% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddHighNarrowUpper.Vector128.UInt32.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningHighNarrowUpper.Vector128.UInt32.cs with 91% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddRoundedHighNarrowLower.Vector64.Byte.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningHighNarrowLower.Vector64.Byte.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddRoundedHighNarrowLower.Vector64.Int16.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningHighNarrowLower.Vector64.Int16.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddRoundedHighNarrowLower.Vector64.Int32.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningHighNarrowLower.Vector64.Int32.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddRoundedHighNarrowLower.Vector64.SByte.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningHighNarrowLower.Vector64.SByte.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddRoundedHighNarrowLower.Vector64.UInt16.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningHighNarrowLower.Vector64.UInt16.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddRoundedHighNarrowLower.Vector64.UInt32.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningHighNarrowLower.Vector64.UInt32.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddRoundedHighNarrowUpper.Vector128.Byte.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningRoundedHighNarrowUpper.Vector128.Byte.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddRoundedHighNarrowUpper.Vector128.Int16.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningRoundedHighNarrowUpper.Vector128.Int16.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddRoundedHighNarrowUpper.Vector128.Int32.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningRoundedHighNarrowUpper.Vector128.Int32.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddRoundedHighNarrowUpper.Vector128.SByte.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningRoundedHighNarrowUpper.Vector128.SByte.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddRoundedHighNarrowUpper.Vector128.UInt16.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningRoundedHighNarrowUpper.Vector128.UInt16.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddRoundedHighNarrowUpper.Vector128.UInt32.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningRoundedHighNarrowUpper.Vector128.UInt32.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AdvSimd_r.csproj		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AdvSimd_ro.csproj		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Program.AdvSimd.cs		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractHighNarrowLower.Vector64.Byte.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningHighNarrowLower.Vector64.Byte.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractHighNarrowLower.Vector64.Int16.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningHighNarrowLower.Vector64.Int16.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractHighNarrowLower.Vector64.Int32.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningHighNarrowLower.Vector64.Int32.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractHighNarrowLower.Vector64.SByte.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningHighNarrowLower.Vector64.SByte.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractHighNarrowLower.Vector64.UInt16.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningHighNarrowLower.Vector64.UInt16.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractHighNarrowLower.Vector64.UInt32.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningHighNarrowLower.Vector64.UInt32.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractHighNarrowUpper.Vector128.Byte.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningHighNarrowUpper.Vector128.Byte.cs with 91% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractHighNarrowUpper.Vector128.Int16.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningHighNarrowUpper.Vector128.Int16.cs with 91% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractHighNarrowUpper.Vector128.Int32.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningHighNarrowUpper.Vector128.Int32.cs with 91% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractHighNarrowUpper.Vector128.SByte.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningHighNarrowUpper.Vector128.SByte.cs with 91% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractHighNarrowUpper.Vector128.UInt16.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningHighNarrowUpper.Vector128.UInt16.cs with 91% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractHighNarrowUpper.Vector128.UInt32.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningHighNarrowUpper.Vector128.UInt32.cs with 91% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractRoundedHighNarrowLower.Vector64.Byte.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningRoundedHighNarrowLower.Vector64.Byte.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractRoundedHighNarrowLower.Vector64.Int16.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningRoundedHighNarrowLower.Vector64.Int16.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractRoundedHighNarrowLower.Vector64.Int32.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningRoundedHighNarrowLower.Vector64.Int32.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractRoundedHighNarrowLower.Vector64.SByte.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningRoundedHighNarrowLower.Vector64.SByte.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractRoundedHighNarrowLower.Vector64.UInt16.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningRoundedHighNarrowLower.Vector64.UInt16.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractRoundedHighNarrowLower.Vector64.UInt32.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningRoundedHighNarrowLower.Vector64.UInt32.cs with 90% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractRoundedHighNarrowUpper.Vector128.Byte.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningRoundedHighNarrowUpper.Vector128.Byte.cs with 91% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractRoundedHighNarrowUpper.Vector128.Int16.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningHighNarrowUpper.Vector128.Int16.cs with 91% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractRoundedHighNarrowUpper.Vector128.Int32.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningHighNarrowUpper.Vector128.Int32.cs with 91% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractRoundedHighNarrowUpper.Vector128.SByte.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractReturningHighNarrowUpper.Vector128.SByte.cs with 91% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractRoundedHighNarrowUpper.Vector128.UInt16.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningRoundedHighNarrowUpper.Vector128.UInt16.cs with 91% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/SubtractRoundedHighNarrowUpper.Vector128.UInt32.cs	[moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddReturningRoundedHighNarrowUpper.Vector128.UInt32.cs with 91% similarity]	diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/Shared/GenerateTests.csx		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/Shared/Helpers.cs		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/Shared/Helpers.tt		diff \| blob \| history
src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/AdvSimd.PlatformNotSupported.cs		diff \| blob \| history
src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/AdvSimd.cs		diff \| blob \| history
src/libraries/System.Runtime.Intrinsics.Experimental/ref/System.Runtime.Intrinsics.Experimental.cs		diff \| blob \| history