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(parent: 3475dc3) | patch
R600/SI: Only select cvt_flr/cvt_rpi with no NaNs.
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Sat, 31 Jan 2015 21:28:13 +0000 (21:28 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Sat, 31 Jan 2015 21:28:13 +0000 (21:28 +0000)
commit08ad328ae20c6335d7354059ff1287671bb490c0
treeb01a8c0d3f790ecfe121b2a14814997a42ed1cdbtree | snapshot
parent3475dc358c6f76d38b58373dd77adf0f16b0b01fcommit | diff
R600/SI: Only select cvt_flr/cvt_rpi with no NaNs.

These have different behavior from cvt_i32_f32 on NaN.

llvm-svn: 227693
llvm/lib/Target/R600/AMDGPUInstructions.td diff | blob | history
llvm/test/CodeGen/R600/cvt_flr_i32_f32.ll diff | blob | history
llvm/test/CodeGen/R600/cvt_rpi_i32_f32.ll diff | blob | history
Domain: System / Toolchain;