RISC-V: add rd reg parsing to insn.h header
authorHeiko Stuebner <heiko.stuebner@vrull.eu>
Fri, 23 Dec 2022 22:13:30 +0000 (23:13 +0100)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 29 Dec 2022 14:59:50 +0000 (06:59 -0800)
commit088ec01fce4eaba17ada8b1831be0c172c941657
tree556f4367f8cc604827972c50b1d921cd12becfc1
parent8963d6224009d7ac0523a05ceb9ea5d04ad5d12d
RISC-V: add rd reg parsing to insn.h header

Add a macro to allow parsing of the rd register from an instruction.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Link: https://lore.kernel.org/r/20221223221332.4127602-11-heiko@sntech.de
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/insn.h