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(parent: 30ea0c4) | patch
Virtualize TargetInstrInfo::getRegClass()
authorStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>
Thu, 20 Jun 2019 14:59:28 +0000 (14:59 +0000)
committerStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>
Thu, 20 Jun 2019 14:59:28 +0000 (14:59 +0000)
commit082ffa9960cc14e76313e29caba011ef5552f0a6
treed5712d5cb1c724c381662e6f45be586b346f5bb8tree | snapshot
parent30ea0c4d74e7c363ef0fc14f1c9a28d0ed657368commit | diff
Virtualize TargetInstrInfo::getRegClass()

AMDGPU target needs to override getRegClass() used during
instruction selection. We now may have either 32 or 64 bit
conditional registers used in the same instructions. For
that purpose special SReg_1 register class is created which
is dynamically resolved to either SReg_64 or SGPR_32 depending
on the subtarget attributes.

Differential Revision: https://reviews.llvm.org/D63205

llvm-svn: 363931
llvm/include/llvm/CodeGen/TargetInstrInfo.h diff | blob | history
Domain: System / Toolchain;