clk: qcom: Add regmap mux-div clocks support
authorGeorgi Djakov <georgi.djakov@linaro.org>
Tue, 5 Dec 2017 15:46:59 +0000 (17:46 +0200)
committerStephen Boyd <sboyd@codeaurora.org>
Tue, 2 Jan 2018 18:00:24 +0000 (10:00 -0800)
commit081bfeed5f1b8394d993afa6b0ce20ed3e868960
treec8b3e1123868a819f068c95bd7855a49a47a2d32
parent0c6ab1b8f8940d4ddbfff7ddff080cbfb5f32b02
clk: qcom: Add regmap mux-div clocks support

Add support for hardware that can switch both parent clock and divider
at the same time. This avoids generating intermediate frequencies from
either the old parent clock and new divider or new parent clock and
old divider combinations.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Tested-by: Amit Kucheria <amit.kucheria@linaro.org>
[sboyd@codeaurora.org: Change a comment style, drop parent_map in
favor of a u32 array instead, export symbols for clk_ops and mux
function]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/qcom/Makefile
drivers/clk/qcom/clk-regmap-mux-div.c [new file with mode: 0644]
drivers/clk/qcom/clk-regmap-mux-div.h [new file with mode: 0644]