RISC-V: always report presence of extensions formerly part of the base ISA
authorConor Dooley <conor.dooley@microchip.com>
Wed, 7 Jun 2023 20:28:31 +0000 (21:28 +0100)
committerPalmer Dabbelt <palmer@rivosinc.com>
Wed, 21 Jun 2023 14:45:19 +0000 (07:45 -0700)
commit07edc32779e3dfe164970fc254291258277219c9
tree80b70e506f16a268d6d5624a236d652cbfc695b0
parent1e5cae98e46d15f4dc7c675e1bd0ed2172ea181c
RISC-V: always report presence of extensions formerly part of the base ISA

Of these four extensions, two were part of the base ISA when the port was
written and are required by the kernel. The other two are implied when
`i` is in riscv,isa on DT systems.
There's not much that userspace can do with this extra information, but
there is no harm in reporting an ISA string that closer resembles the
current versions of the specifications either.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230607-nest-collision-5796b6be8be6@spud
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/hwcap.h
arch/riscv/kernel/cpu.c
arch/riscv/kernel/cpufeature.c