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(parent: 09e5665) | patch
drm/amd/display: Fix soft hang issue when some DPCD data invalid
authorAnthony Koo <Anthony.Koo@amd.com>
Fri, 15 Feb 2019 19:19:30 +0000 (14:19 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 19 Mar 2019 20:04:03 +0000 (15:04 -0500)
commit07d6a199219562834757ac72c28f3836b4e85694
treecaba52fc93644be81e6293f2a689e17dfba01f9ftree | snapshot
parent09e5665adafa4b00e04acbaa96c73532942f09b3commit | diff
drm/amd/display: Fix soft hang issue when some DPCD data invalid

[Why]
AUX transaction returns success, but data has invalid lane count and rate
which when passed to VBIOS command table causes it to soft hang

[How]
Do some sanity checking and fail if the DPCD caps are invalid.

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c diff | blob | history
Domain: System / Kernel;