net: hns3: add 5ms delay before clear firmware reset irq source
authorJie Wang <wangjie125@huawei.com>
Mon, 18 Sep 2023 07:48:40 +0000 (15:48 +0800)
committerPaolo Abeni <pabeni@redhat.com>
Tue, 19 Sep 2023 10:13:08 +0000 (12:13 +0200)
commit0770063096d5da4a8e467b6e73c1646a75589628
tree5c0c07087d342527150eb47c470144307e3cc39a
parent1a7be66e4685b8541546222c305cce9710718a88
net: hns3: add 5ms delay before clear firmware reset irq source

Currently the reset process in hns3 and firmware watchdog init process is
asynchronous. we think firmware watchdog initialization is completed
before hns3 clear the firmware interrupt source. However, firmware
initialization may not complete early.

so we add delay before hns3 clear firmware interrupt source and 5 ms delay
is enough to avoid second firmware reset interrupt.

Fixes: c1a81619d73a ("net: hns3: Add mailbox interrupt handling to PF driver")
Signed-off-by: Jie Wang <wangjie125@huawei.com>
Signed-off-by: Jijie Shao <shaojijie@huawei.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c