intel/xehp: Switch to coarser cross-slice pixel hashing with table permutation.
authorFrancisco Jerez <currojerez@riseup.net>
Wed, 13 Oct 2021 06:57:53 +0000 (23:57 -0700)
committerFrancisco Jerez <currojerez@riseup.net>
Tue, 11 Jan 2022 02:28:35 +0000 (18:28 -0800)
commit074bde9989dfcc9e7ad5999564d3c32cbd7a8d93
tree64b8d4fab5ee6cfd8455faf7ea7ba97bc5f798c4
parentef675e685777ba87e62f374e1d74bbf0deb5734b
intel/xehp: Switch to coarser cross-slice pixel hashing with table permutation.

The coarser 32x32 cross-slice hashing mode seems to lead to better L1
and L2 utilization due to the improved execution locality, however it
can also lead to a bottleneck in a single slice, especially in
workloads that concentrate heavy rendering in small areas of the
screen (e.g. SynMark2 OglGeomPoint, OglTerrain*) -- This effect is
mitigated here by performing a permutation of the pixel pipe hashing
tables that ensures that adjacent rows map to pixel pipes as far away
as possible in the caching hierarchy.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13569>
src/gallium/drivers/iris/iris_state.c
src/intel/common/intel_pixel_hash.h
src/intel/genxml/gen125.xml
src/intel/vulkan/genX_state.c