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author	Shengzhou Liu <Shengzhou.Liu@nxp.com>
	Thu, 7 Apr 2016 08:22:21 +0000 (16:22 +0800)
committer	York Sun <york.sun@nxp.com>
	Tue, 17 May 2016 16:26:19 +0000 (09:26 -0700)
commit	074596c0b5f4e9a3642a3159a9fc7f8b8064c18a
tree	645933dc5c430f57d2c27ce98af98329d02852e0	tree \| snapshot
parent	aeaec0e682f45b9e0c62c522fafea353931f73ed	commit \| diff

armv8/ls1043: Add workaround for DDR erratum A-008850

Barrier transactions from CCI400 need to be disabled till
the DDR is configured, otherwise it may lead to system hang.
The patch adds workaround to fix the erratum.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

Domain: System / Kernel;

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arch/arm/cpu/armv8/fsl-layerscape/soc.c		diff \| blob \| history
arch/arm/include/asm/arch-fsl-layerscape/config.h		diff \| blob \| history
board/freescale/ls1043aqds/ddr.c		diff \| blob \| history
board/freescale/ls1043aqds/ddr.h		diff \| blob \| history
board/freescale/ls1043aqds/ls1043aqds.c		diff \| blob \| history
board/freescale/ls1043ardb/ddr.c		diff \| blob \| history
board/freescale/ls1043ardb/ddr.h		diff \| blob \| history
board/freescale/ls1043ardb/ls1043ardb.c		diff \| blob \| history
include/fsl_ddr_sdram.h		diff \| blob \| history