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(parent: a0d2a2c) | patch
clk: renesas: r9a07g044: Add WDT clock and reset entries
authorBiju Das <biju.das.jz@bp.renesas.com>
Thu, 4 Nov 2021 16:08:57 +0000 (16:08 +0000)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 15 Nov 2021 09:47:18 +0000 (10:47 +0100)
commit073da9e7c768b0d81f9ce22cc907227450612d88
tree6436a7a669fc0be20f4b9fabdb0c3e9e83c2e736tree | snapshot
parenta0d2a2c6736c849463b424a7203f5e0e40949c03commit | diff
clk: renesas: r9a07g044: Add WDT clock and reset entries

Add WDT{0,1,2} clock and reset entries to CPG driver.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20211104160858.15550-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r9a07g044-cpg.c diff | blob | history
Domain: System / Kernel;