[Hexagon] Further improve code generation for shuffles
authorKrzysztof Parzyszek <kparzysz@quicinc.com>
Thu, 24 Nov 2022 15:05:10 +0000 (07:05 -0800)
committerKrzysztof Parzyszek <kparzysz@quicinc.com>
Tue, 29 Nov 2022 22:19:29 +0000 (14:19 -0800)
commit073d5e5945c428e20db0884943e6dcb7ff2158df
treed3aafb4e399c9ade688b674f32606e43f222549f
parentd4cb39287c50234e15d11e1b5bc90e9c7ebf08b7
[Hexagon] Further improve code generation for shuffles

* Concatenate partial shuffles into longer ones whenever possible:
In selection DAG, shuffle's operands and return type must all agree. This
is not the case in LLVM IR, and non-conforming IR-level shuffles will be
rewritten to match DAG's requirements. This can also make a shuffle that
can be matched to a single HVX instruction become shuffles that require
more complex handling. Example: anything that takes two single vectors
and returns a pair (e.g. V6_vshuffvdd).
This is avoided by concatenating such shuffles into ones that take a vector
pair, and an undef pair, and produce a vector pair.

* Recognize perfect shuffles when masks contain `undef` values.

* Use funnel shifts for contracting shuffles.

* Recognize rotations as a separate step.

These changes go into a single commit, because each one on their own
introduced some regressions.
llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.h
llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
llvm/lib/Target/Hexagon/HexagonISelLowering.h
llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
llvm/test/CodeGen/Hexagon/autohvx/int-to-fp.ll
llvm/test/CodeGen/Hexagon/autohvx/mulh.ll
llvm/test/CodeGen/Hexagon/autohvx/qmul.ll
llvm/test/CodeGen/Hexagon/autohvx/shuffle-half-128b.ll
llvm/test/CodeGen/Hexagon/autohvx/shuffle-half-64b.ll