serial: fsl_lpuart: zero out parity bit in CS7 mode
authorShenwei Wang <shenwei.wang@nxp.com>
Thu, 14 Jul 2022 18:58:58 +0000 (13:58 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 28 Jul 2022 08:34:04 +0000 (10:34 +0200)
commit070298c84e5b924c688a4d08c3a9193175cdffd8
treedec9c09bf7578e767612f4ad527c331e774b490c
parentc474c775716edd46a51bf8161142bbd1545f8733
serial: fsl_lpuart: zero out parity bit in CS7 mode

The LPUART hardware doesn't zero out the parity bit on the received
characters. This behavior won't impact the use cases of CS8 because
the parity bit is the 9th bit which is not currently used by software.
But the parity bit for CS7 must be zeroed out by software in order to
get the correct raw data.

Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
Link: https://lore.kernel.org/r/20220714185858.615373-1-shenwei.wang@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/tty/serial/fsl_lpuart.c