drm/i915: Fix PSR2 selective update corruption after PSR1 setup
authorJosé Roberto de Souza <jose.souza@intel.com>
Thu, 14 Mar 2019 23:01:13 +0000 (16:01 -0700)
committerJosé Roberto de Souza <jose.souza@intel.com>
Tue, 19 Mar 2019 19:37:43 +0000 (12:37 -0700)
commit06dd94cccdd142423fa5ce9f5c3ea0274ca84709
tree9c67aaeb117fca5509193fb339efacdbb411c329
parentd2daff2c09887c18ce839daf1c428cededc8cae0
drm/i915: Fix PSR2 selective update corruption after PSR1 setup

There is probably a issue in DMC firmwares(icl_dmc_ver1_07.bin and
kbl_dmc_ver1_04.bin at least) that causes PSR2 SU to fail after
exiting DC6 if EDP_PSR_TP1_TP3_SEL is kept in PSR_CTL, so for now
lets workaround the issue by cleaning PSR_CTL before enable PSR2.

v2:
- Updated commit description and comment to state that it may be
a DMC firmware issue (Rodrigo)
- No need to RMW, let's write 0 to PSR_CTL(Dhinakaran)

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190314230113.6571-1-jose.souza@intel.com
drivers/gpu/drm/i915/intel_psr.c