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author	Catalin Marinas <catalin.marinas@arm.com>
	Fri, 20 May 2022 17:51:54 +0000 (18:51 +0100)
committer	Catalin Marinas <catalin.marinas@arm.com>
	Fri, 20 May 2022 17:51:54 +0000 (18:51 +0100)
commit	0616ea3f1b93a99264d84f3d002ae117f6526b62
tree	f805067a257b1e467ffe38bb43b7f8c148a19101	tree \| snapshot
parent	d6fc5db0f82828c74742319cb6c988c4a8aac535	commit \| diff
parent	18f3976fdb5da2ba9572845e6f7dfb58652871ea	commit \| diff

Merge branch 'for-next/esr-elx-64-bit' into for-next/core

* for-next/esr-elx-64-bit:
  : Treat ESR_ELx as a 64-bit register.
  KVM: arm64: uapi: Add kvm_debug_exit_arch.hsr_high
  KVM: arm64: Treat ESR_EL2 as a 64-bit register
  arm64: Treat ESR_ELx as a 64-bit register
  arm64: compat: Do not treat syscall number as ESR_ELx for a bad syscall
  arm64: Make ESR_ELx_xVC_IMM_MASK compatible with assembly

Domain: System / Kernel;

RSS Atom

arch/arm64/include/asm/esr.h	diff1 \|	diff2 \|	blob \| history
arch/arm64/include/asm/exception.h	diff1 \|	diff2 \|	blob \| history
arch/arm64/include/asm/kvm_host.h	diff1 \|	diff2 \|	blob \| history
arch/arm64/kernel/entry-common.c	diff1 \|	diff2 \|	blob \| history
arch/arm64/kernel/fpsimd.c	diff1 \|	diff2 \|	blob \| history
arch/arm64/kernel/traps.c	diff1 \|	diff2 \|	blob \| history
arch/arm64/kvm/sys_regs.c	diff1 \|	diff2 \|	blob \| history
arch/arm64/mm/fault.c	diff1 \|	diff2 \|	blob \| history