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(parent: 0814c2c) | patch
freedreno,turnip: Make number of VSC pipes configurable
authorDanylo Piliaiev <dpiliaiev@igalia.com>
Mon, 30 Jan 2023 17:09:42 +0000 (18:09 +0100)
committerMarge Bot <emma+marge@anholt.net>
Thu, 13 Jul 2023 18:06:36 +0000 (18:06 +0000)
commit05fffc7b25379700548afe64466de1fd7b95de93
tree338f1a5de39d45eabf9f339cd2536d5c5ac3b294tree | snapshot
parent0814c2c7a6dbbb456facfd6c21a768d4461115aecommit | diff
freedreno,turnip: Make number of VSC pipes configurable

a610/a608 has less pipes, so we need to make it configurable.

In particular we need to program all of the VSC_PIPE_CONFIG_REG[n]
rather than leaving garbage values for the unused pipes.  Pointing
multiple VSC pipes at the same bin makes the hw angry.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20991>
src/freedreno/common/freedreno_devices.py diff | blob | history
src/freedreno/vulkan/tu_cmd_buffer.cc diff | blob | history
src/freedreno/vulkan/tu_util.cc diff | blob | history
src/gallium/drivers/freedreno/a6xx/fd6_gmem.cc diff | blob | history
Domain: Graphics System / GL;