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(parent: d770e55) | patch
clk: imx: clk-imx6q: Provide initial IPU clock settings for mx6dl
authorFabio Estevam <fabio.estevam@freescale.com>
Fri, 26 Jun 2015 17:10:54 +0000 (14:10 -0300)
committerShawn Guo <shawnguo@kernel.org>
Mon, 13 Jul 2015 08:35:30 +0000 (16:35 +0800)
commit05e062f92c917b14ffa944e4a98e5348b53b1390
tree29fabd2da2c71f45f24b9d2ae5572e6097080bcatree | snapshot
parentd770e558e21961ad6cfdf0ff7df0eb5d7d4f0754commit | diff
clk: imx: clk-imx6q: Provide initial IPU clock settings for mx6dl

Currently it is not possible to use HDMI and LVDS at the same time on a
imx6dl-sabresd board.

Fix this usecase by setting IMX6QDL_CLK_PLL3_PFD1_540M to 540MHz and
also by setting it as the parent of IMX6QDL_CLK_IPU1_SEL.

Based on the configuration done in the FSL kernel.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
drivers/clk/imx/clk-imx6q.c diff | blob | history
Domain: System / Kernel;