clk: sunxi-ng: Add sigma-delta modulation support
authorChen-Yu Tsai <wens@csie.org>
Thu, 12 Oct 2017 08:36:59 +0000 (16:36 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Fri, 13 Oct 2017 07:27:06 +0000 (09:27 +0200)
commit05d2eaac96d4284b0967cc522ad22f6f23fdf82a
treeb5f0cdb3f0a033ae2b1fb3667813153077fd5236
parent4cdbc40d64d4b8303a97e29a52862e4d99502beb
clk: sunxi-ng: Add sigma-delta modulation support

Sigma-delta modulation is supported for some PLLs. This allows
fractional-N multipliers to be used. In reality we don't know
how to configure the individual settings for it. However we can
copy existing settings from the vendor kernel to support clock
rates that cannot be generated from integer factors, but are
really desired. The vendor kernel only uses this for the audio
PLL clock, and only on the latest chips.

This patch adds a new class of clocks, along with helper functions.
It is intended to be merged into N-M-factor style clocks as a
feature, much like fractional clocks.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
drivers/clk/sunxi-ng/Makefile
drivers/clk/sunxi-ng/ccu_common.h
drivers/clk/sunxi-ng/ccu_sdm.c [new file with mode: 0644]
drivers/clk/sunxi-ng/ccu_sdm.h [new file with mode: 0644]