[AMDGPU][MC][GFX11] Correct v_dot2_f16_f16 and v_dot2_bf16_bf16
authorDmitry Preobrazhensky <d-pre@mail.ru>
Wed, 3 Aug 2022 12:08:23 +0000 (15:08 +0300)
committerDmitry Preobrazhensky <d-pre@mail.ru>
Wed, 3 Aug 2022 12:08:23 +0000 (15:08 +0300)
commit05b3aadfff13fda6c586d9dd811f69c1f38260f5
treeb978a3f406583bb9dedcb1045ac39539353ef1ba
parentae553f9e49f9d1758320f10ad3ecb548a1cb0ccf
[AMDGPU][MC][GFX11] Correct v_dot2_f16_f16 and v_dot2_bf16_bf16

Enable SGPRs for the following operands of these opcodes:

- src operands of VOP3 variant.
- src2 operand of DPP variants.

Differential Revision: https://reviews.llvm.org/D130989
llvm/lib/Target/AMDGPU/VOP3Instructions.td
llvm/test/MC/AMDGPU/gfx11_asm_dpp16.s
llvm/test/MC/AMDGPU/gfx11_asm_dpp8.s
llvm/test/MC/AMDGPU/gfx11_vop123.s
llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_all.txt
llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt