pinctrl: sunxi: Add driver for Allwinner D1
authorSamuel Holland <samuel@sholland.org>
Wed, 13 Jul 2022 02:52:33 +0000 (21:52 -0500)
committerLinus Walleij <linus.walleij@linaro.org>
Mon, 18 Jul 2022 09:39:33 +0000 (11:39 +0200)
commit0569af4811549fe368a53414f37ab53fecbbaf23
tree82cf1a5c0467796ae8c574a6e026e2848ee84725
parent622b681ef9d9e7d636108cda4e45a2a7695ebe92
pinctrl: sunxi: Add driver for Allwinner D1

This SoC contains a pinctrl with a new register layout. Use the variant
parameter to set the right register offsets. This pinctrl also increases
the number of functions per pin from 8 to 16, taking advantage of all 4
bits in the mux config field (so far, only functions 0-8 and 14-15 are
used). This increases the maximum possible number of functions.

Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Link: https://lore.kernel.org/r/20220713025233.27248-7-samuel@sholland.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/sunxi/Kconfig
drivers/pinctrl/sunxi/Makefile
drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c [new file with mode: 0644]
drivers/pinctrl/sunxi/pinctrl-sunxi.c
drivers/pinctrl/sunxi/pinctrl-sunxi.h