intel/dev: Implement DG2 restrictions requiring additional DSSes to be disabled.
authorFrancisco Jerez <currojerez@riseup.net>
Fri, 10 Dec 2021 00:29:06 +0000 (16:29 -0800)
committerMarge Bot <emma+marge@anholt.net>
Fri, 7 Jan 2022 07:58:27 +0000 (07:58 +0000)
commit054eb9f3468068085f23b991321a23b900a52009
tree6e3c2f09331c1f421c60504991834f6924cef097
parente48c29acca078fbe6e2a95c1cd7056d84eff8fbf
intel/dev: Implement DG2 restrictions requiring additional DSSes to be disabled.

Note that this causes a geometry slice to be disabled if any DSS is
fused off within that slice, which may seem stricter than the BSpec
quotation implies, but testing shows that pixel pipes with any faulted
DSS don't work at all, and that using a slice with any faulted pixel
pipe leads to serious graphics corruption.

It would be better to query this geometry topology information from
the hardware instead of trying to reconstruct it here, but the kernel
interface for that is not available yet.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14436>
src/intel/dev/intel_device_info.c