clk: sunxi-ng: Add driver for A83T CCU
authorChen-Yu Tsai <wens@csie.org>
Fri, 19 May 2017 07:06:09 +0000 (15:06 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Wed, 7 Jun 2017 13:32:16 +0000 (15:32 +0200)
commit05359be1176bd097af9e7e833ff0317c55c5a86c
treec96a380ecce0b678480d533eb8951152aa4f706e
parent13e0dde8b2ed043aa3e65437342d501715d975c1
clk: sunxi-ng: Add driver for A83T CCU

The A83T clock control unit is a hybrid of some new style clock designs
from the A80, and old style layout from the other Allwinner SoCs.

Like the A80, the SoC does not have a low speed 32.768 kHz oscillator.
Unlike the A80, there is no clock input either. The only low speed clock
available is the internal oscillator which runs at around 16 MHz,
divided by 512, yielding a low speed clock around 31.250 kHz.

Also, the MMC2 module clock supports switching to a "new timing" mode.
This mode divides the clock output by half, and disables the CCU based
clock delays. The MMC controller must be configure to the same mode,
and then use its internal clock delays.

This driver does not support runtime switching of the timing modes.
Instead, the new timing mode is enforced at probe time. Consumers can
check which mode is active by trying to get the current phase delay
of the MMC2 phase clocks, which will return -ENOTSUPP if the new
timing mode is active.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
drivers/clk/sunxi-ng/Kconfig
drivers/clk/sunxi-ng/Makefile
drivers/clk/sunxi-ng/ccu-sun8i-a83t.c [new file with mode: 0644]
drivers/clk/sunxi-ng/ccu-sun8i-a83t.h [new file with mode: 0644]
include/dt-bindings/clock/sun8i-a83t-ccu.h [new file with mode: 0644]
include/dt-bindings/reset/sun8i-a83t-ccu.h [new file with mode: 0644]