drm/i915:bxt: implement WaProgramL3SqcReg1DefaultForPerf
authorTim Gore <tim.gore@intel.com>
Fri, 22 Apr 2016 08:46:01 +0000 (09:46 +0100)
committerTvrtko Ursulin <tvrtko.ursulin@intel.com>
Mon, 25 Apr 2016 09:06:56 +0000 (10:06 +0100)
commit050fc4653c3634762dca4e5cfdeb43a31163f056
treea47f0e0577623067d9bbe3d1ce498a6cdc132177
parent5b4fd5b1111b1230cd037df3b314e7b36d45d483
drm/i915:bxt: implement WaProgramL3SqcReg1DefaultForPerf

This patch applies a performance enhancement workaround
based on analysis of DX and OCL S-Curve workloads. We
increase the General Priority Credits for L3SQ from the
hardware default of 56 to the max value 62, and decrease
the High Priority credits from 8 to 2.

v2: Only apply to B0 onwards

v3: Move w/a to per engine init, ie bxt_init_workarounds

Signed-off-by: Tim Gore <tim.gore@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1461314761-36854-1-git-send-email-tim.gore@intel.com
Reviewed-by: Michel Thierry <michel.thierry@intel.com>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_ringbuffer.c