perf/imx_ddr: don't enable counter0 if none of 4 counters are used
authorXu Yang <xu.yang_2@nxp.com>
Fri, 11 Aug 2023 01:54:38 +0000 (09:54 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 13 Sep 2023 07:42:29 +0000 (09:42 +0200)
commit048d1a8b9da8d4d36ae4b092342740f08bb7346a
tree6e21ea1fc9427382962dcfe64ea1c3297ca12094
parent5fce29ab20cb05797239e4628fb683d2ee9aa140
perf/imx_ddr: don't enable counter0 if none of 4 counters are used

[ Upstream commit f4e2bd91ddf5e8543cbe7ad80b3fba3d2dc63fa3 ]

In current driver, counter0 will be enabled after ddr_perf_pmu_enable()
is called even though none of the 4 counters are used. This will cause
counter0 continue to count until ddr_perf_pmu_disabled() is called. If
pmu is not disabled all the time, the pmu interrupt will be asserted
from time to time due to counter0 will overflow and irq handler will
clear it. It's not an expected behavior. This patch will not enable
counter0 if none of 4 counters are used.

Fixes: 9a66d36cc7ac ("drivers/perf: imx_ddr: Add DDR performance counter support to perf")
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20230811015438.1999307-2-xu.yang_2@nxp.com
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/perf/fsl_imx8_ddr_perf.c