[AMDGPU] gfx11 CodeGen for new DPP instructions
authorJoe Nash <Joseph.Nash@amd.com>
Mon, 27 Jun 2022 17:20:21 +0000 (13:20 -0400)
committerJoe Nash <Joseph.Nash@amd.com>
Tue, 5 Jul 2022 14:17:59 +0000 (10:17 -0400)
commit0483c91eee9e60c82ff09ec7fd84ea0519122b79
tree05b64bc0d46c42366e3715504eaff78b2669a47c
parentcc6462a475e20f6b8f04c04e9039d9198be523be
[AMDGPU] gfx11 CodeGen for new DPP instructions

Modifies the GCNDPPCombine pass to enable DPP formation for the new DPP
instruction in gfx11, namely VOP3 encoded instructions with DPP and VOPC
with DPP.

Depends on D128656

Reviewed By: #amdgpu, rampitec

Differential Revision: https://reviews.llvm.org/D128682
12 files changed:
llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
llvm/lib/Target/AMDGPU/SIInstrInfo.h
llvm/lib/Target/AMDGPU/SIInstrInfo.td
llvm/lib/Target/AMDGPU/VOPInstructions.td
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
llvm/test/CodeGen/AMDGPU/dpp64_combine.ll
llvm/test/CodeGen/AMDGPU/dpp_combine.ll
llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir [new file with mode: 0644]
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
llvm/test/CodeGen/AMDGPU/vopc_dpp.mir [new file with mode: 0644]