pinctrl: sunxi: Fix A64 UART mux value
authorAndre Przywara <andre.przywara@arm.com>
Sat, 25 Nov 2017 12:12:30 +0000 (12:12 +0000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 25 Feb 2018 10:07:56 +0000 (11:07 +0100)
commit04521caaea964d627d4c969da7887935150d7280
tree95a939256ee19652228d0413ef5bfb22d89e6bec
parentb1f0445d07f356a1b79c2fc6a370d755f703bc5e
pinctrl: sunxi: Fix A64 UART mux value

[ Upstream commit 7c5c2c2d18d778e51fd8b899965097168306031c ]

To use pin PF4 as the RX signal of UART0, we have to write 0b011 into
the respective pin controller register.
Fix the wrong value we had in our table so far.

Fixes: 96851d391d02 ("drivers: pinctrl: add driver for Allwinner A64 SoC")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c