clk: sunxi-ng: sun5i: Use sigma-delta modulation for audio PLL
authorChen-Yu Tsai <wens@csie.org>
Thu, 12 Oct 2017 08:37:03 +0000 (16:37 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Fri, 13 Oct 2017 07:27:29 +0000 (09:27 +0200)
commit042f7f8f9715096abce42b944d4a23b0e3c31521
treeebae9c1ce8c3846bf0f6ed23af25725cf95a7a12
parentde344851919493033cdaa5736b2bfbcb05b50038
clk: sunxi-ng: sun5i: Use sigma-delta modulation for audio PLL

The audio blocks require specific clock rates. Until now we were using
the closest clock rate possible with integer N-M factors. This resulted
in audio playback being slightly slower than it should be.

The vendor kernel gets around this (for newer SoCs) by using sigma-delta
modulation to generate a fractional-N factor. As the PLL hardware is
identical in most chips, we can back port the settings from the newer
SoC, in this case the H3, onto the sun5i family.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
drivers/clk/sunxi-ng/ccu-sun5i.c