ARM: dts: r8a7743: Add OPP table for frequency scaling
authorBiju Das <biju.das@bp.renesas.com>
Tue, 8 Aug 2017 10:56:33 +0000 (11:56 +0100)
committerSimon Horman <horms+renesas@verge.net.au>
Thu, 17 Aug 2017 08:33:01 +0000 (10:33 +0200)
commit0417814ea140d1bc7e8a5d54e95e17a234b34e49
treea6cb0780aee5c9b10f7469a1636f03fbc88625d6
parent60dce695b097a52e6ea5874aa80301f2e4ac627a
ARM: dts: r8a7743: Add OPP table for frequency scaling

Add needed information inside CPU0 for the generic cpufreq-cpu0 driver.

- clock-latency = 300 us
Approximate worst-case latency to do clock transition for every
OPPs. Using an arbitrary safe value similar to r8a7791(R-Car M2) Soc.

- operating-points = < kHz - uV >
List of 6 operating points. All of them are using the same voltage
since DVS is not supported in RZ/G1 Soc.

Note:This also fixes the below errors seen on kernel logs
[    0.876877] cpu cpu0: dev_pm_opp_get_opp_count: OPP table not found (-19)
[    0.883727] cpu cpu1: cpufreq_init: failed to get clk: -2

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r8a7743.dtsi